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| SSM4880AGM N-CHANNEL ENHANCEMENT-MODE POWER MOSFET Low on-resistance Fast switching, planar construction Simple drive requirement D D D BV DSS R DS(ON) G 30V 9m 13A D ID SO-8 S S S Description D Power MOSFETs from Silicon Standard provide the designer with the best combination of fast switching, ruggedized device design, low on-resistance and cost-effectiveness. G G The SO-8 package is widely preferred for commercial and industrial surface mount applications and the SSM4880AGM is well suited for for low-voltage applications such as DC/DC converters. SS Pb-free lead finish (second-level interconnect) Absolute Maximum Ratings Symbol VDS VGS ID @ TA=25C ID @ TA=70C IDM PD @ TA=25C EAS IAR TSTG TJ Parameter Drain-Source Voltage Gate-Source Voltage Continuous Drain Current Continuous Drain Current Pulsed Drain Current 1 3 3 Rating 30 20 13 10 50 2.5 0.02 4 Units V V A A A W W/C mJ A C C Total Power Dissipation Linear Derating Factor Single Pulse Avalanche Energy Avalanche Current Storage Temperature Range Operating Junction Temperature Range 266 7.3 -55 to 150 -55 to 150 Thermal Data Symbol Rthj-a Parameter Thermal Resistance Junction-ambient 3 Value Max. 50 Unit C/W 3/08/2005 Rev.2.2 www.SiliconStandard.com 1 of 5 SSM4880AGM Electrical Characteristics @ Tj=25oC (unless otherwise specified) Symbol BVDSS BV DSS/Tj Parameter Drain-Source Breakdown Voltage Test Conditions VGS=0V, ID=250uA Min. 30 1 - Typ. 0.037 Max. Units 9 15 3 1 25 V V/C m m V S uA uA nA nC nC nC ns ns ns ns pF pF pF Breakdown Voltage Temperature Coefficient Reference to 25C, ID=1mA RDS(ON) VGS(th) gfs IDSS IGSS Qg Qgs Qgd td(on) tr td(off) tf Ciss Coss Crss Static Drain-Source On-Resistance VGS=10V, ID=13A VGS=4.5V, ID=10A VDS=VGS, ID=250uA VDS=15V, ID=10A VDS=30V, VGS=0V VDS=24V, VGS=0V VGS= 20V ID=13A VDS=15V VGS=5V VDS=15V ID=1A RG=6.2 ,VGS=10V RD=15 VGS=0V VDS=25V f=1.0MHz 20 - Gate Threshold Voltage Forward Transconductance Drain-Source Leakage Current (Tj=25C) Drain-Source Leakage Current (Tj=55C) Gate-Source Leakage Total Gate Charge 2 100 22.5 3.3 15.4 9 16 25 50 813 516 224 - Gate-Source Charge Gate-Drain ("Miller") Charge Turn-on Delay Time Rise Time Turn-off Delay Time Fall Time Input Capacitance Output Capacitance Reverse Transfer Capacitance 2 Source-Drain Diode Symbol IS ISM VSD Parameter Continuous Source Current ( Body Diode ) Test Conditions VD=VG=0V , VS=1.3V 1 Min. - Typ. - Max. Units 2.3 50 1.3 A A V Pulsed Source Current ( Body Diode ) Forward On Voltage 2 Tj=25C, IS=2.3A, VGS=0V Notes: 1.Pulse width limited by safe operating area. 2.Pulse width <300us , duty cycle <2%. 3.Surface mounted on 1 in2 copper pad of FR4 board ; 125C/W when mounted on min. copper pad. 4.Starting Tj=25oC , VDD=25V , L=10mH , R G=25 3/08/2005 Rev.2.2 www.SiliconStandard.com 2 of 5 SSM4880AGM 50 50 40 T A =25 C o ID , Drain Current (A) 30 V G = 4 .0 V ID , Drain Current (A) 10V 8.0V 6.0V 5.0V T A =150 o C 40 10V 8.0V 6.0V 5.0V 30 V G = 4 .0 V 20 20 10 10 0 0 1 2 3 4 5 6 0 0 1 2 3 4 5 6 V DS , Drain-to-Source Voltage (V) V DS , Drain-to-Source Voltage (V) Fig 1. Typical Output Characteristics Fig 2. Typical Output Characteristics 21 1.8 Normalized R DS(ON) 17 I D =10A T A =25C 1.6 I D =13A V G =10V 1.4 RDS(ON) (m ) 13 1.2 1 9 0.8 5 0.6 2 4 6 8 10 -50 0 50 100 150 V GS , Gate-to-Source Voltage (V) T j , Junction Temperature ( o C) Fig 3. On-Resistance vs. Gate Voltage Fig 4. Normalized On-Resistance vs. Junction Temperature 3 100 T j =150 o C T j =25 o C 1 VGS(th) (V) 1.1 1.3 IS(A) 10 2 1 0.1 0.1 0.3 0.5 0.7 0.9 0 -50 0 50 100 150 V SD , Source-to-Drain Voltage (V) T j , Junction Temperature( C) o Fig 5. Forward Characteristic of Reverse Diode 3/08/2005 Rev.2.2 Fig 6. Gate Threshold Voltage vs. Junction Temperature www.SiliconStandard.com 3 of 5 SSM4880AGM f=1.0MHz 16 10000 14 VGS , Gate to Source Voltage (V) I D =13A V DS =15V 12 10 C (pF) 8 1000 C iss C oss 6 4 C rss 2 0 0 10 20 30 40 50 100 1 6 11 16 21 Q G , Total Gate Charge (nC) V DS , Drain-to-Source Voltage (V) Fig 7. Gate Charge Characteristics Fig 8. Typical Capacitance Characteristics 100 1 Duty factor = 0.5 Normalized Thermal Response (Rthja) 0.2 10 1ms 10ms ID (A) 1 0.1 0.1 0.05 0.02 100ms 1s 10s DC 0.01 PDM 0.01 Single Pulse t T Duty Factor = t/T Peak Tj = PDM x Rthja + Ta Rthja=125oC/W 0.1 T A =25 C Single Pulse o 0.01 0.1 1 10 100 0.001 0.0001 0.001 0.01 0.1 1 10 100 1000 V DS , Drain-to-Source Voltage (V) t , Pulse Width (s) Fig 9. Maximum Safe Operating Area Fig 10. Effective Transient Thermal Impedance VDS 90% VG QG 5V QGS QGD 10% VGS td(on) tr td(off) tf Charge Q Fig 11. Switching Time Waveform 3/08/2005 Rev.2.2 Fig 12. Gate Charge Waveform www.SiliconStandard.com 4 of 5 SSM4880AGM Information furnished by Silicon Standard Corporation is believed to be accurate and reliable. However, Silicon Standard Corporation makes no guarantee or warranty, express or implied, as to the reliability, accuracy, timeliness or completeness of such information and assumes no responsibility for its use, or for infringement of any patent or other intellectual property rights of third parties that may result from its use. Silicon Standard reserves the right to make changes as it deems necessary to any products described herein for any reason, including without limitation enhancement in reliability, functionality or design. No license is granted, whether expressly or by implication, in relation to the use of any products described herein or to the use of any information provided herein, under any patent or other intellectual property rights of Silicon Standard Corporation or any third parties. 3/08/2005 Rev.2.2 www.SiliconStandard.com 5 of 5 |
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